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status_t(* | get_pci_info )(PCI_Info_s *psInfo, int nIndex) |
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uint32(* | read_pci_config )(int nBusNum, int nDevNum, int nFncNum, int nOffset, int nSize) |
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status_t(* | write_pci_config )(int nBusNum, int nDevNum, int nFncNum, int nOffset, int nSize, uint32 nValue) |
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void(* | enable_pci_master )(int nBusNum, int nDevNum, int nFncNum) |
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void(* | set_pci_latency )(int nBusNum, int nDevNum, int nFncNum, uint8 nLatency) |
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uint8(* | get_pci_capability )(int nBusNum, int nDevNum, int nFncNum, uint8 nCapID) |
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int(* | read_pci_header )(PCI_Entry_s *psInfo, int nBusNum, int nDevNum, int nFncNum) |
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int(* | get_pci_device_type )(PCI_Info_s *psInfo) |
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status_t(* | get_bar_info )(PCI_Entry_s *psInfo, uintptr_t *pAddress, uintptr_t *pnSize, int nReg, int nType) |
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The documentation for this struct was generated from the following file:
